For the automotive-grade chip validation cycle, a fixed industry rule of thumb circulates: AEC-Q100 reliability testing usually takes 6 to 9 months; adding functional safety assessment and downstream review, the whole process generally runs 12 to 24 months; ASIL D products take longer from project initiation to launch. These numbers are not wrong, but they compress multiple layers of fundamentally different work into a single duration, obscuring the contradictions in the time structure.
What we commonly call “passing automotive-grade qualification” is a three-layer serial validation chain. The first layer is chip-level AEC-Q100 validation. AEC only issues standards, not certificates; after vendors complete the seven stress test groups A through G, they issue a certification report, which OEMs accept via the PPAP process; third-party labs only provide test reports. This layer assesses the chip’s failure risk under temperature, humidity, vibration, and long-term life stress. The second layer is Tier1 module-level DV/PV validation. Passing AEC-Q100 on the chip alone is only the starting point; once installed in a module, it must be jointly debugged with power devices, the bus, and the motor to verify switching transient EMC, short circuit, overcurrent protection, and other system conditions. The third layer is OEM vehicle-level validation; high/low temperature, durability, and road calibration are often seasonally constrained—winter calibration often needs to span two winter windows. The three layers proceed in sequence; if any layer fails, subsequent stages must be rescheduled. The 12 to 24 months we often cite is the full-chain cycle including iteration, retesting, and queuing.
But what really consumes time is often not the tests themselves, but queuing: lab slots, burn-in board and test fixture scheduling, failure-analysis manpower, and re-queuing for iteration after a failure. Take HTOL high-voltage life testing: 1,000 hours works out to about 42 days, already one of the longer items in AEC-Q100; most other stress tests are only tens to hundreds of hours, and these tests fall far short of today’s “long cycles.” Test standards are the same for all vendors, but scheduling speed is a variable that can fluctuate; some domestic labs have shorter lead times, giving domestic vendors better flexibility here.
However, failure is a normal branch in the process. AEC-Q100 requires at least three lots of samples to participate in evaluation; if any one lot shows early failure, testing must be paused, failure analysis initiated to locate design, process, or packaging issues, and after a revision and tape-out, requeue for retesting. Insufficient EMC margin and ESD noncompliance follow the same iterative process; a single round of adjustment often takes three to six months and does not necessarily converge in one pass.
This leads to the core point: the risk brought by certification is not “slowness” but “uncertainty.” A longer cycle can be planned for in advance, but delays, rework, and solution overhauls caused by failures are hard to budget for in advance. This uncertainty ultimately lands on three types of upfront commitments that must be made early and are costly to roll back—this is the essence of the long-cycle trap.
Investment commitment
The cost of automotive-grade chips does not begin on the day certification is passed. An ASIL D product starts from architecture definition, and its development cycle is measured in years; the cost of the safety architecture varies by device type. MCUs and SoCs use dual-core lockstep to push CPU subsystem area to nearly double; depending on integration level, overall chip area increases by 20% to 40% and power consumption rises by about 50%. Analog and power devices achieve the same goal through diagnostics and redundant monitoring, with the cost reflected in peripheral circuits and test time. Third-party certification fees are on the order of several million to more than RMB 10 million. Statistics from industry research institute IIM show that a high-safety-grade chip takes an average of about 11 months to complete the full Q100 and ISO 26262 certification suite; investment in a single complex chip exceeds USD 1.8 million, and the full cost for medium complexity is mostly RMB 5 million to 8 million.
Costs accumulate before certification, while revenue comes a step later. Certification, customer design-in, DV, PPAP, and production ramp-up each push the revenue recognition point back once more.
Investment preceding revenue is common to long-cycle R&D, mainly because the two timelines are driven by different mechanisms. The scale and sequence of investment are determined by standards; for each item on the standards-defined checklist, a corresponding amount of manpower and time must be invested. The scale and pace of revenue are determined by customers—how much the market is willing to pay for the chip and how much it will purchase depends on the competitive landscape and the customer's architecture choices. For the former timeline, vendors can only comply; for the latter, they can only compete for it, and there is no automatic alignment mechanism between the two.
Compared with equally long-cycle sectors such as industrial and medical, automotive-grade requirements stretch this distance even longer and place a potentially failing gate in the middle. AEC-Q100 requires samples from three batches to participate in evaluation; if early failures occur in one batch, work must stop for failure analysis, identify whether the issue lies in design, process, or packaging, and after improvements, re-tape-out, re-queue, and re-test, with one round taking three to six months. Investment is therefore not a one-time expenditure but a sequence that may overlap with failures.
Although AEC-Q100 and customer change control allow tiered assessment by change type, with some changes going through delta validation, after adding Tier 1 module validation and OEM vehicle-level validation, the additional cost and schedule pressure caused by minor specification adjustments are still higher than in most industrial scenarios. The same validation investment in industrial sectors may still flow to other customers or projects; once an automotive-grade project misses a nomination, it is difficult to directly reuse that investment on other vehicle models.
Seat Commitment
Automakers and Tier 1 suppliers will not use uncertified chips in mass-production vehicles, and there are basically no exceptions for safety-related components. However, chip vendors provide engineering samples to Tier 1 suppliers before certification is complete, for architecture evaluation and joint debugging in Tier 1 pre-research projects; only when mass-production chips are ready does the customer enter DV with a formal part number. In other words, chip vendors must use samples to compete for inclusion in the customer's pre-research hardware architecture while certification results are still unknown.
The pressure does not come from certification itself, but from the closing pace of the customer's pre-research window. Take a Tier 1 supplier using the IPD system as an example: the PRD (Product Requirements Document) is frozen after the product concept review is approved, and post-freeze requirement changes must go through change control. If the change proportion exceeds the threshold or a major change at the product-definition level occurs, the project must be re-initiated. Once the PRD is frozen, the cost of changing a chip is not just the chip price, but the risk to the entire hardware solution, the change review process, and even project re-initiation. If certification progress falls behind the pre-research design freeze milestone, what is lost is the very window to be designed in.
The width of this window is still narrowing: traditional automakers need 36 to 48 months from project initiation to SOP, while new entrants have compressed it to 18 to 24 months, with some projects down to 12 months. The figures given by Gasgoo Automotive Research Institute at a forum in September 2026 were: when the new-vehicle development cycle is compressed to 12 months, suppliers are left with only 3 to 4 months to complete development and validation, including winter calibration that must be completed across two winter windows. The vehicle validation window is compressed to 3 to 4 months, meaning the chip's Q100 must be completed before that. The model development cycle has been compressed from the traditional three to four years to 18 to 24 months, and the time margin in the Tier1 pre-research phase is compressed in parallel, while certification time will not shorten just because a project is more urgent.
As the window narrows, chipmakers have less room for error in establishing design-in relationships before certification is complete. The timing structure of certification determines who can enter this competition and at what pace.
Capacity commitments
Capacity locking for automotive chips is being stretched to a timescale far beyond the certification cycle. 8-inch capacity is shrinking, automotive wafers account for a limited share of capacity at leading foundries, and long-term agreements have become the norm. In September 2026, Elmos and SK keyfoundry signed an agreement in Frankfurt to lock stable supply of 130nm automotive wafers through 2037; the two companies have collaborated on the 350nm platform for 18 years. The first product on the 130nm platform, E550.01, is a four-channel eFuse controller; samples have already been provided, and mass production is planned for 2027. Elmos is fabless, and its CEO described plainly what this agreement buys: planning certainty and supply reliability through 2037.
From a technical standpoint, this agreement carries very low risk. The locked 130nm node is a mature specialty process; DTI deep trench isolation, high-voltage mixed-signal, and embedded flash have much longer life cycles at this node than general-purpose processes. Automotive products do not chase the most advanced nodes in the first place; they chase long-term supply and process stability. Technically, such nodes have very low substitutability.
The risk lies in volume commitments. During the chip shortage from 2021 to 2023, many Tier1s and chipmakers signed take-or-pay long-term agreements, buying out several years of usage; as inventory destocking began in 2024, growth in automotive chip demand fell back, and these agreements turned into inventory write-downs and idle capacity. The technology route and process were not chosen wrongly; the mistake was the judgment of volume, and when the agreements were signed, the volume judgment, like the certification conclusion, still had no answer.
The timescale of capacity locking is several years, longer than the technology iteration cycle; automotive products carry supply obligations of more than ten years, longer still than capacity locking itself. Once the locked volume fails to match real demand, the misjudgment will not be corrected quickly; instead, it will keep amplifying along product lines and customer structures.
The distance between 'passing certification' and 'passing competitively'
There is also an easily overlooked dimension: there is a substantial distance between passing certification and passing it competitively.
A chip can complete automotive qualification after 24 months, but if by then the customer's platform architecture has already moved toward higher integration, or major international vendors have cut prices for chips with equivalent functions, passing certification does not automatically convert into orders. Sinowealth Electronic's public statements provide a supporting example. Its first automotive-grade MCU has passed AEC-Q100 certification and achieved mass production in Q3 2025; two automotive-grade chips are currently in sales promotion. The company said in institutional research that customer certification cycles for automotive products are long and implementation pace is heavily affected by end-terminal projects, and whether it can generate scale revenue in H2 2026 and 2027 is uncertain. Completing certification, achieving mass production, and entering sales still do not provide a timetable for scale revenue.
In addition, the long cycle has asymmetric implications for incumbents and challengers, further widening this gap. Infineon, TI, NXP and other vendors have accumulated certification assets and customer relationships across multiple generations of automotive-grade products; their existing products do not need to wait for a new certification cycle. The existing base itself constitutes automotive-grade assets: certification data that can be reused directly, part numbers derived through platformization, and validation records that customers have already run. With these assets, commitments for new projects can be smaller, and there is more tolerance for solution adjustments.
For domestic challengers, the long cycle also means they must pay the full cost of certification entry and must win trust for pre-development design-in before certification is complete. Most domestic challengers' existing base often comes from accumulation in non-automotive-grade categories such as industrial and consumer products; their reusable validation assets and deeply bound nomination base on the automotive-grade side are relatively weak. This accumulation can relieve funding pressure for R&D investment, but it is difficult to convert directly into pre-development admission qualification and opportunities for joint architecture decisions. When they use these assets to trade for an automotive-grade slot, what they can mainly offer is shorter delivery times, lower prices, and earlier capacity guarantees—and these commitments are all made while certification outcomes are still undetermined.
The scale of existing product categories is the financial and organizational precondition for a long-cycle product line to continue advancing, but it does not shorten certification time. Incumbents use existing assets to wait for new certifications, while challengers use existing assets to catch up with the certification assets incumbents already possess—and both certification clocks run at the same speed.
The Essence of the Long-Cycle Trap
Bringing the three types of commitments together, the core judgment can be stated as follows: the “long cycle” of certification itself is an inherent constraint of the track; the trap comes from timing mismatch—vendors must continuously make irreversible commitments at a stage when neither certification results nor commercial returns have materialized: investing R&D resources, securing architecture pre-development seats, and locking foundry capacity. The degree of irreversibility increases across the three: if R&D investment fails, IP and validation data can still be moved to other product lines; if a pre-development seat is lost, the next platform round can still be pursued; once a long-term capacity agreement is signed, it is executed annually, with no low-cost exit channel. The certification process does not force vendors to make these commitments; they are more a choice spawned by the combination of commercial competition and supply chain models.
One change should be mentioned. On 2026/8/17, the Certification and Accreditation Administration of the PRC issued Announcement No. 15 of 2026; five automotive chip certification and accreditation industry standards will take effect on October 1. The standards regulate the capability thresholds of organizations that evaluate chips—design organizations, certification bodies, and testing organizations. They address a long-standing problem: for the same chip and the same set of standards, a report issued by automaker A is not accepted by automaker B, and switching to another automaker requires retesting. After the standards take effect, reports issued by compliant organizations will be accepted across the industry, and the time and cost of repeated certification will decrease.
However, what this standard improves is the test delivery efficiency for an already frozen solution; it does not change the time structure of certification, nor the customer-side validation process after certification: the chip runs in the customer's system, passes durability tests without issue, and shows no batch anomalies during mass production. The length of this phase is not determined by the standard or by investment. At the same time, the scarcity of passing certification is declining—when reports are credible and mutually recognized, a single report is no longer enough to form a barrier. Getting through the trap of the long automotive-grade cycle does not depend on a single smooth certification pass, but on the accumulation of continuously completing certification, continuously securing design wins, and continuously delivering without problems.